19 |
* along with this program ; if not, write to the Free Software |
* along with this program ; if not, write to the Free Software |
20 |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
21 |
* |
* |
22 |
* $Id: xvid.h,v 1.53 2005-12-09 04:45:35 syskin Exp $ |
* $Id: xvid.h,v 1.60 2006-12-06 19:55:07 Isibaar Exp $ |
23 |
* |
* |
24 |
****************************************************************************/ |
****************************************************************************/ |
25 |
|
|
73 |
* doesnt hurt but not increasing it could cause difficulty for decoders in the |
* doesnt hurt but not increasing it could cause difficulty for decoders in the |
74 |
* future |
* future |
75 |
*/ |
*/ |
76 |
#define XVID_BS_VERSION 40 |
#define XVID_BS_VERSION 47 |
77 |
|
|
78 |
/***************************************************************************** |
/***************************************************************************** |
79 |
* error codes |
* error codes |
102 |
#define XVID_CSP_YUY2 (1<< 3) /* 4:2:2 packed */ |
#define XVID_CSP_YUY2 (1<< 3) /* 4:2:2 packed */ |
103 |
#define XVID_CSP_UYVY (1<< 4) /* 4:2:2 packed */ |
#define XVID_CSP_UYVY (1<< 4) /* 4:2:2 packed */ |
104 |
#define XVID_CSP_YVYU (1<< 5) /* 4:2:2 packed */ |
#define XVID_CSP_YVYU (1<< 5) /* 4:2:2 packed */ |
105 |
|
#define XVID_CSP_RGB (1<<16) /* 24-bit rgb packed */ |
106 |
#define XVID_CSP_BGRA (1<< 6) /* 32-bit bgra packed */ |
#define XVID_CSP_BGRA (1<< 6) /* 32-bit bgra packed */ |
107 |
#define XVID_CSP_ABGR (1<< 7) /* 32-bit abgr packed */ |
#define XVID_CSP_ABGR (1<< 7) /* 32-bit abgr packed */ |
108 |
#define XVID_CSP_RGBA (1<< 8) /* 32-bit rgba packed */ |
#define XVID_CSP_RGBA (1<< 8) /* 32-bit rgba packed */ |
170 |
#define XVID_CPU_MMXEXT (1<< 1) /* mmx-ext : pentium2, athlon */ |
#define XVID_CPU_MMXEXT (1<< 1) /* mmx-ext : pentium2, athlon */ |
171 |
#define XVID_CPU_SSE (1<< 2) /* sse : pentium3, athlonXP */ |
#define XVID_CPU_SSE (1<< 2) /* sse : pentium3, athlonXP */ |
172 |
#define XVID_CPU_SSE2 (1<< 3) /* sse2 : pentium4, athlon64 */ |
#define XVID_CPU_SSE2 (1<< 3) /* sse2 : pentium4, athlon64 */ |
173 |
|
#define XVID_CPU_SSE3 (1<< 8) /* sse3 : pentium4, athlon64 */ |
174 |
#define XVID_CPU_3DNOW (1<< 4) /* 3dnow : k6-2 */ |
#define XVID_CPU_3DNOW (1<< 4) /* 3dnow : k6-2 */ |
175 |
#define XVID_CPU_3DNOWEXT (1<< 5) /* 3dnow-ext : athlon */ |
#define XVID_CPU_3DNOWEXT (1<< 5) /* 3dnow-ext : athlon */ |
176 |
#define XVID_CPU_TSC (1<< 6) /* tsc : Pentium */ |
#define XVID_CPU_TSC (1<< 6) /* tsc : Pentium */ |
487 |
extern xvid_plugin_func xvid_plugin_psnr; /* write psnr values to stdout */ |
extern xvid_plugin_func xvid_plugin_psnr; /* write psnr values to stdout */ |
488 |
extern xvid_plugin_func xvid_plugin_dump; /* dump before and after yuvpgms */ |
extern xvid_plugin_func xvid_plugin_dump; /* dump before and after yuvpgms */ |
489 |
|
|
490 |
|
extern xvid_plugin_func xvid_plugin_ssim; /*write ssim values to stdout*/ |
491 |
|
|
492 |
|
|
493 |
/* single pass rate control |
/* single pass rate control |
494 |
* CBR and Constant quantizer modes */ |
* CBR and Constant quantizer modes */ |
542 |
|
|
543 |
}xvid_plugin_2pass2_t; |
}xvid_plugin_2pass2_t; |
544 |
|
|
545 |
|
|
546 |
|
typedef struct{ |
547 |
|
/*stat output*/ |
548 |
|
int b_printstat; |
549 |
|
char* stat_path; |
550 |
|
|
551 |
|
/*visualize*/ |
552 |
|
int b_visualize; |
553 |
|
|
554 |
|
/*accuracy 0 very accurate 4 very fast*/ |
555 |
|
int acc; |
556 |
|
|
557 |
|
} xvid_plugin_ssim_t; |
558 |
|
|
559 |
/***************************************************************************** |
/***************************************************************************** |
560 |
* ENCODER API |
* ENCODER API |
561 |
****************************************************************************/ |
****************************************************************************/ |