19 |
; * along with this program ; if not, write to the Free Software |
; * along with this program ; if not, write to the Free Software |
20 |
; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
21 |
; * |
; * |
22 |
; * $Id: cpuid.asm,v 1.12 2008-08-19 09:06:48 Isibaar Exp $ |
; * $Id: cpuid.asm,v 1.14 2008-11-14 15:43:28 Isibaar Exp $ |
23 |
; * |
; * |
24 |
; ***************************************************************************/ |
; ***************************************************************************/ |
25 |
|
|
30 |
%ifdef MARK_FUNCS |
%ifdef MARK_FUNCS |
31 |
global _%1:function %1.endfunc-%1 |
global _%1:function %1.endfunc-%1 |
32 |
%define %1 _%1:function %1.endfunc-%1 |
%define %1 _%1:function %1.endfunc-%1 |
33 |
|
%define ENDFUNC .endfunc |
34 |
%else |
%else |
35 |
global _%1 |
global _%1 |
36 |
%define %1 _%1 |
%define %1 _%1 |
37 |
|
%define ENDFUNC |
38 |
%endif |
%endif |
39 |
%else |
%else |
40 |
%ifdef MARK_FUNCS |
%ifdef MARK_FUNCS |
41 |
global %1:function %1.endfunc-%1 |
global %1:function %1.endfunc-%1 |
42 |
|
%define ENDFUNC .endfunc |
43 |
%else |
%else |
44 |
global %1 |
global %1 |
45 |
|
%define ENDFUNC |
46 |
%endif |
%endif |
47 |
%endif |
%endif |
48 |
%endmacro |
%endmacro |
56 |
%define CPUID_SSE 0x02000000 |
%define CPUID_SSE 0x02000000 |
57 |
%define CPUID_SSE2 0x04000000 |
%define CPUID_SSE2 0x04000000 |
58 |
%define CPUID_SSE3 0x00000001 |
%define CPUID_SSE3 0x00000001 |
59 |
|
%define CPUID_SSE41 0x00080000 |
60 |
|
|
61 |
%define EXT_CPUID_3DNOW 0x80000000 |
%define EXT_CPUID_3DNOW 0x80000000 |
62 |
%define EXT_CPUID_AMD_3DNOWEXT 0x40000000 |
%define EXT_CPUID_AMD_3DNOWEXT 0x40000000 |
68 |
%define XVID_CPU_SSE (1<< 2) |
%define XVID_CPU_SSE (1<< 2) |
69 |
%define XVID_CPU_SSE2 (1<< 3) |
%define XVID_CPU_SSE2 (1<< 3) |
70 |
%define XVID_CPU_SSE3 (1<< 8) |
%define XVID_CPU_SSE3 (1<< 8) |
71 |
|
%define XVID_CPU_SSE41 (1<< 9) |
72 |
%define XVID_CPU_3DNOW (1<< 4) |
%define XVID_CPU_3DNOW (1<< 4) |
73 |
%define XVID_CPU_3DNOWEXT (1<< 5) |
%define XVID_CPU_3DNOWEXT (1<< 5) |
74 |
%define XVID_CPU_TSC (1<< 6) |
%define XVID_CPU_TSC (1<< 6) |
162 |
; SSE3 support? |
; SSE3 support? |
163 |
CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp, ecx |
CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp, ecx |
164 |
|
|
165 |
|
; SSE41 support? |
166 |
|
CHECK_FEATURE CPUID_SSE41, XVID_CPU_SSE41, ebp, ecx |
167 |
|
|
168 |
; extended functions? |
; extended functions? |
169 |
mov eax, 0x80000000 |
mov eax, 0x80000000 |
170 |
cpuid |
cpuid |
203 |
pop ebx |
pop ebx |
204 |
|
|
205 |
ret |
ret |
206 |
.endfunc |
ENDFUNC |
207 |
|
|
208 |
; sse/sse2 operating support detection routines |
; sse/sse2 operating support detection routines |
209 |
; these will trigger an invalid instruction signal if not supported. |
; these will trigger an invalid instruction signal if not supported. |
212 |
sse_os_trigger: |
sse_os_trigger: |
213 |
xorps xmm0, xmm0 |
xorps xmm0, xmm0 |
214 |
ret |
ret |
215 |
.endfunc |
ENDFUNC |
216 |
|
|
217 |
|
|
218 |
ALIGN 16 |
ALIGN 16 |
220 |
sse2_os_trigger: |
sse2_os_trigger: |
221 |
xorpd xmm0, xmm0 |
xorpd xmm0, xmm0 |
222 |
ret |
ret |
223 |
.endfunc |
ENDFUNC |
224 |
|
|
225 |
|
|
226 |
; enter/exit mmx state |
; enter/exit mmx state |
229 |
emms_mmx: |
emms_mmx: |
230 |
emms |
emms |
231 |
ret |
ret |
232 |
.endfunc |
ENDFUNC |
233 |
|
|
234 |
; faster enter/exit mmx state |
; faster enter/exit mmx state |
235 |
ALIGN 16 |
ALIGN 16 |
237 |
emms_3dn: |
emms_3dn: |
238 |
femms |
femms |
239 |
ret |
ret |
240 |
.endfunc |
ENDFUNC |
241 |
|
|
242 |
|
|
243 |
|
|