Diff of /trunk/xvidcore/src/utils/x86_asm/cpuid.asm

	revision 1519, Sat Jul 24 11:46:08 2004 UTC	revision 1764, Wed Dec 6 19:55:07 2006 UTC
#	Line 19	Line 19
19	; * along with this program ; if not, write to the Free Software	; * along with this program ; if not, write to the Free Software
20	; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA	; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21	; *	; *
22	; * $Id: cpuid.asm,v 1.7 2004-07-24 11:46:08 edgomez Exp $	; * $Id: cpuid.asm,v 1.10 2006-12-06 19:55:07 Isibaar Exp $
23	; *	; *
24	; ***************************************************************************/	; ***************************************************************************/
25
#	Line 27	Line 27
27
28	%macro cglobal 1	%macro cglobal 1
29	%ifdef PREFIX	%ifdef PREFIX
30		%ifdef MARK_FUNCS
31		global _%1:function %1.endfunc-%1
32		%define %1 _%1:function %1.endfunc-%1
33		%else
34	global _%1	global _%1
35	%define %1 _%1	%define %1 _%1
36		%endif
37		%else
38		%ifdef MARK_FUNCS
39		global %1:function %1.endfunc-%1
40	%else	%else
41	global %1	global %1
42	%endif	%endif
43		%endif
44	%endmacro	%endmacro
45
46	;=============================================================================	;=============================================================================
#	Line 42	Line 51
51	%define CPUID_MMX 0x00800000	%define CPUID_MMX 0x00800000
52	%define CPUID_SSE 0x02000000	%define CPUID_SSE 0x02000000
53	%define CPUID_SSE2 0x04000000	%define CPUID_SSE2 0x04000000
54		%define CPUID_SSE3 0x00000001
55
56	%define EXT_CPUID_3DNOW 0x80000000	%define EXT_CPUID_3DNOW 0x80000000
57	%define EXT_CPUID_AMD_3DNOWEXT 0x40000000	%define EXT_CPUID_AMD_3DNOWEXT 0x40000000
#	Line 52	Line 62
62	%define XVID_CPU_MMXEXT (1<< 1)	%define XVID_CPU_MMXEXT (1<< 1)
63	%define XVID_CPU_SSE (1<< 2)	%define XVID_CPU_SSE (1<< 2)
64	%define XVID_CPU_SSE2 (1<< 3)	%define XVID_CPU_SSE2 (1<< 3)
65		%define XVID_CPU_SSE3 (1<< 8)
66	%define XVID_CPU_3DNOW (1<< 4)	%define XVID_CPU_3DNOW (1<< 4)
67	%define XVID_CPU_3DNOWEXT (1<< 5)	%define XVID_CPU_3DNOWEXT (1<< 5)
68	%define XVID_CPU_TSC (1<< 6)	%define XVID_CPU_TSC (1<< 6)
#	Line 142	Line 153
153	; SSE2 support?	; SSE2 support?
154	CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp	CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp
155
156		; SSE3 support?
157		CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp
158
159	; extended functions?	; extended functions?
160	mov eax, 0x80000000	mov eax, 0x80000000
161	cpuid	cpuid
#	Line 180	Line 194
194	pop ebx	pop ebx
195
196	ret	ret
197		.endfunc
198
199	; sse/sse2 operating support detection routines	; sse/sse2 operating support detection routines
200	; these will trigger an invalid instruction signal if not supported.	; these will trigger an invalid instruction signal if not supported.
#	Line 188	Line 203
203	sse_os_trigger:	sse_os_trigger:
204	xorps xmm0, xmm0	xorps xmm0, xmm0
205	ret	ret
206		.endfunc
207
208
209	ALIGN 16	ALIGN 16
#	Line 195	Line 211
211	sse2_os_trigger:	sse2_os_trigger:
212	xorpd xmm0, xmm0	xorpd xmm0, xmm0
213	ret	ret
214		.endfunc
215
216
217	; enter/exit mmx state	; enter/exit mmx state
#	Line 203	Line 220
220	emms_mmx:	emms_mmx:
221	emms	emms
222	ret	ret
223		.endfunc
224
225	; faster enter/exit mmx state	; faster enter/exit mmx state
226	ALIGN 16	ALIGN 16
#	Line 210	Line 228
228	emms_3dn:	emms_3dn:
229	femms	femms
230	ret	ret
231		.endfunc
232
233

 Legend:



Removed from v.1519
 


changed lines


 
Added in v.1764
 Legend:



Removed from v.1519
 


changed lines


 
Added in v.1764
-Removed from v.1519
+Added in v.1764

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