19 |
; * along with this program ; if not, write to the Free Software |
; * along with this program ; if not, write to the Free Software |
20 |
; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
; * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
21 |
; * |
; * |
22 |
; * $Id: cpuid.asm,v 1.5 2004-03-22 22:36:24 edgomez Exp $ |
; * $Id: cpuid.asm,v 1.12 2008-08-19 09:06:48 Isibaar Exp $ |
23 |
; * |
; * |
24 |
; ***************************************************************************/ |
; ***************************************************************************/ |
25 |
|
|
27 |
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|
28 |
%macro cglobal 1 |
%macro cglobal 1 |
29 |
%ifdef PREFIX |
%ifdef PREFIX |
30 |
|
%ifdef MARK_FUNCS |
31 |
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global _%1:function %1.endfunc-%1 |
32 |
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%define %1 _%1:function %1.endfunc-%1 |
33 |
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%else |
34 |
global _%1 |
global _%1 |
35 |
%define %1 _%1 |
%define %1 _%1 |
36 |
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%endif |
37 |
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%else |
38 |
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%ifdef MARK_FUNCS |
39 |
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global %1:function %1.endfunc-%1 |
40 |
%else |
%else |
41 |
global %1 |
global %1 |
42 |
%endif |
%endif |
43 |
|
%endif |
44 |
%endmacro |
%endmacro |
45 |
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|
46 |
;============================================================================= |
;============================================================================= |
51 |
%define CPUID_MMX 0x00800000 |
%define CPUID_MMX 0x00800000 |
52 |
%define CPUID_SSE 0x02000000 |
%define CPUID_SSE 0x02000000 |
53 |
%define CPUID_SSE2 0x04000000 |
%define CPUID_SSE2 0x04000000 |
54 |
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%define CPUID_SSE3 0x00000001 |
55 |
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|
56 |
%define EXT_CPUID_3DNOW 0x80000000 |
%define EXT_CPUID_3DNOW 0x80000000 |
57 |
%define EXT_CPUID_AMD_3DNOWEXT 0x40000000 |
%define EXT_CPUID_AMD_3DNOWEXT 0x40000000 |
62 |
%define XVID_CPU_MMXEXT (1<< 1) |
%define XVID_CPU_MMXEXT (1<< 1) |
63 |
%define XVID_CPU_SSE (1<< 2) |
%define XVID_CPU_SSE (1<< 2) |
64 |
%define XVID_CPU_SSE2 (1<< 3) |
%define XVID_CPU_SSE2 (1<< 3) |
65 |
|
%define XVID_CPU_SSE3 (1<< 8) |
66 |
%define XVID_CPU_3DNOW (1<< 4) |
%define XVID_CPU_3DNOW (1<< 4) |
67 |
%define XVID_CPU_3DNOWEXT (1<< 5) |
%define XVID_CPU_3DNOWEXT (1<< 5) |
68 |
%define XVID_CPU_TSC (1<< 6) |
%define XVID_CPU_TSC (1<< 6) |
73 |
|
|
74 |
ALIGN 32 |
ALIGN 32 |
75 |
%ifdef FORMAT_COFF |
%ifdef FORMAT_COFF |
76 |
SECTION .rodata data |
SECTION .rodata |
77 |
%else |
%else |
78 |
SECTION .rodata data align=16 |
SECTION .rodata align=16 |
79 |
%endif |
%endif |
80 |
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|
81 |
vendorAMD: |
vendorAMD: |
85 |
; Macros |
; Macros |
86 |
;============================================================================= |
;============================================================================= |
87 |
|
|
88 |
%macro CHECK_FEATURE 3 |
%macro CHECK_FEATURE 4 |
89 |
mov ecx, %1 |
mov eax, %1 |
90 |
and ecx, edx |
and eax, %4 |
91 |
neg ecx |
neg eax |
92 |
sbb ecx, ecx |
sbb eax, eax |
93 |
and ecx, %2 |
and eax, %2 |
94 |
or %3, ecx |
or %3, eax |
95 |
%endmacro |
%endmacro |
96 |
|
|
97 |
;============================================================================= |
;============================================================================= |
110 |
push edi |
push edi |
111 |
push ebp |
push ebp |
112 |
|
|
113 |
|
sub esp, 12 ; Stack space for vendor name |
114 |
|
|
115 |
xor ebp, ebp |
xor ebp, ebp |
116 |
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|
117 |
; CPUID command ? |
; CPUID command ? |
131 |
; get vendor string, used later |
; get vendor string, used later |
132 |
xor eax, eax |
xor eax, eax |
133 |
cpuid |
cpuid |
134 |
mov [esp-12], ebx ; vendor string |
mov [esp], ebx ; vendor string |
135 |
mov [esp-12+4], edx |
mov [esp+4], edx |
136 |
mov [esp-12+8], ecx |
mov [esp+8], ecx |
137 |
test eax, eax |
test eax, eax |
138 |
|
|
139 |
jz near .cpu_quit |
jz near .cpu_quit |
142 |
cpuid |
cpuid |
143 |
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|
144 |
; RDTSC command ? |
; RDTSC command ? |
145 |
CHECK_FEATURE CPUID_TSC, XVID_CPU_TSC, ebp |
CHECK_FEATURE CPUID_TSC, XVID_CPU_TSC, ebp, edx |
146 |
|
|
147 |
; MMX support ? |
; MMX support ? |
148 |
CHECK_FEATURE CPUID_MMX, XVID_CPU_MMX, ebp |
CHECK_FEATURE CPUID_MMX, XVID_CPU_MMX, ebp, edx |
149 |
|
|
150 |
; SSE support ? |
; SSE support ? |
151 |
CHECK_FEATURE CPUID_SSE, (XVID_CPU_MMXEXT|XVID_CPU_SSE), ebp |
CHECK_FEATURE CPUID_SSE, (XVID_CPU_MMXEXT|XVID_CPU_SSE), ebp, edx |
152 |
|
|
153 |
; SSE2 support? |
; SSE2 support? |
154 |
CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp |
CHECK_FEATURE CPUID_SSE2, XVID_CPU_SSE2, ebp, edx |
155 |
|
|
156 |
|
; SSE3 support? |
157 |
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CHECK_FEATURE CPUID_SSE3, XVID_CPU_SSE3, ebp, ecx |
158 |
|
|
159 |
; extended functions? |
; extended functions? |
160 |
mov eax, 0x80000000 |
mov eax, 0x80000000 |
167 |
|
|
168 |
; AMD cpu ? |
; AMD cpu ? |
169 |
lea esi, [vendorAMD] |
lea esi, [vendorAMD] |
170 |
lea edi, [esp-12] |
lea edi, [esp] |
171 |
mov ecx, 12 |
mov ecx, 12 |
172 |
cld |
cld |
173 |
repe cmpsb |
repe cmpsb |
174 |
jnz .cpu_quit |
jnz .cpu_quit |
175 |
|
|
176 |
; 3DNow! support ? |
; 3DNow! support ? |
177 |
CHECK_FEATURE EXT_CPUID_3DNOW, XVID_CPU_3DNOW, ebp |
CHECK_FEATURE EXT_CPUID_3DNOW, XVID_CPU_3DNOW, ebp, edx |
178 |
|
|
179 |
; 3DNOW extended ? |
; 3DNOW extended ? |
180 |
CHECK_FEATURE EXT_CPUID_AMD_3DNOWEXT, XVID_CPU_3DNOWEXT, ebp |
CHECK_FEATURE EXT_CPUID_AMD_3DNOWEXT, XVID_CPU_3DNOWEXT, ebp, edx |
181 |
|
|
182 |
; extended MMX ? |
; extended MMX ? |
183 |
CHECK_FEATURE EXT_CPUID_AMD_MMXEXT, XVID_CPU_MMXEXT, ebp |
CHECK_FEATURE EXT_CPUID_AMD_MMXEXT, XVID_CPU_MMXEXT, ebp, edx |
184 |
|
|
185 |
.cpu_quit: |
.cpu_quit: |
186 |
|
|
187 |
mov eax, ebp |
mov eax, ebp |
188 |
|
|
189 |
|
add esp, 12 |
190 |
|
|
191 |
pop ebp |
pop ebp |
192 |
pop edi |
pop edi |
193 |
pop esi |
pop esi |
194 |
pop ebx |
pop ebx |
195 |
|
|
196 |
ret |
ret |
197 |
|
.endfunc |
198 |
|
|
199 |
; sse/sse2 operating support detection routines |
; sse/sse2 operating support detection routines |
200 |
; these will trigger an invalid instruction signal if not supported. |
; these will trigger an invalid instruction signal if not supported. |
203 |
sse_os_trigger: |
sse_os_trigger: |
204 |
xorps xmm0, xmm0 |
xorps xmm0, xmm0 |
205 |
ret |
ret |
206 |
|
.endfunc |
207 |
|
|
208 |
|
|
209 |
ALIGN 16 |
ALIGN 16 |
211 |
sse2_os_trigger: |
sse2_os_trigger: |
212 |
xorpd xmm0, xmm0 |
xorpd xmm0, xmm0 |
213 |
ret |
ret |
214 |
|
.endfunc |
215 |
|
|
216 |
|
|
217 |
; enter/exit mmx state |
; enter/exit mmx state |
220 |
emms_mmx: |
emms_mmx: |
221 |
emms |
emms |
222 |
ret |
ret |
223 |
|
.endfunc |
224 |
|
|
225 |
; faster enter/exit mmx state |
; faster enter/exit mmx state |
226 |
ALIGN 16 |
ALIGN 16 |
228 |
emms_3dn: |
emms_3dn: |
229 |
femms |
femms |
230 |
ret |
ret |
231 |
|
.endfunc |
232 |
|
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233 |
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234 |
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235 |
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%ifidn __OUTPUT_FORMAT__,elf |
236 |
|
section ".note.GNU-stack" noalloc noexec nowrite progbits |
237 |
|
%endif |
238 |
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