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// /**************************************************************************** |
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// * |
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// * XVID MPEG-4 VIDEO CODEC |
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// * - ia64 sum of absolute differences - |
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// * |
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// * Copyright(C) 2002 Hannes Jütting <s_juetti@ira.uka.de> |
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// * Copyright(C) 2002 Christopher Özbek <s_oezbek@ira.uka.de> |
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// * |
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// * This program is an implementation of a part of one or more MPEG-4 |
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// * Video tools as specified in ISO/IEC 14496-2 standard. Those intending |
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// * to use this software module in hardware or software products are |
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// * advised that its use may infringe existing patents or copyrights, and |
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// * any such use would be at such party's own risk. The original |
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// * developer of this software module and his/her company, and subsequent |
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// * editors and their companies, will have no liability for use of this |
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// * software or modifications or derivatives thereof. |
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// * |
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// * This program is free software; you can redistribute it and/or modify |
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// * it under the terms of the GNU General Public License as published by |
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// * the Free Software Foundation; either version 2 of the License, or |
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// * (at your option) any later version. |
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// * |
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// * This program is distributed in the hope that it will be useful, |
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// * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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// * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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// * GNU General Public License for more details. |
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// * |
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// * You should have received a copy of the GNU General Public License |
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// * along with this program; if not, write to the Free Software |
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// * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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// * |
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// ****************************************************************************/ |
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// ------------------------------------------------------------------------------ |
// ------------------------------------------------------------------------------ |
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// * |
// * |
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// * Optimized Assembler Versions of sad8 and sad16 |
// * Optimized Assembler Versions of sad8 and sad16 |
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// * |
// * |
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// ------------------------------------------------------------------------------ |
// ------------------------------------------------------------------------------ |
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.text |
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// ------------------------------------------------------------------------------ |
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// * SAD16_IA64 |
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// * |
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// * In: |
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// * r32 = cur (aligned) |
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// * r33 = ref (not aligned) |
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// * r34 = stride |
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// * r35 = bestsad |
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// * Out: |
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// * r8 = sum of absolute differences |
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// * |
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// ------------------------------------------------------------------------------ |
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.align 16 |
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.global sad16_ia64# |
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.proc sad16_ia64# |
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sad16_ia64: |
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// Define Latencies |
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LL16=3 // load latency |
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SL16=1 // shift latency |
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OL16=1 // or latency |
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PL16=1 // psad latency |
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AL16=1 // add latency |
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// Allocate Registern in RSE |
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alloc r9=ar.pfs,4,36,0,40 |
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// lfetch [r32] // might help |
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mov r8 = r0 // clear the return reg |
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// Save LC and predicates |
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mov r20 = ar.lc |
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mov r21 = pr |
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dep.z r23 = r33, 3, 3 // get the # of bits ref is misaligned |
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and r15 = -8, r33 // align the ref pointer by deleting the last 3 bit |
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mov r14 = r32 // save the cur pointer |
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mov r16 = r34 // save stride |
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mov r17 = r35 // save bestsad |
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;; |
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add r18 = 8, r14 // precalc second cur pointer |
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add r19 = 8, r15 // precalc second ref pointer |
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add r27 = 16, r15 // precalc third ref pointer |
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sub r25 = 64, r23 // # of right shifts |
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// Initialize Loop-counters |
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mov ar.lc = 15 // loop 16 times |
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mov ar.ec = LL16 + SL16 + OL16 + PL16 + AL16 + AL16 |
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mov pr.rot = 1 << 16 // reseting rotating predicate regs and set p16 to 1 |
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;; |
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// Intialize Arrays for Register Rotation |
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.rotr r_cur_ld1[LL16+SL16+OL16+1], r_cur_ld2[LL16+SL16+OL16+1], r_ref_16_ld1[LL16+1], r_ref_16_ld2[LL16+1], r_ref_16_ld3[LL16+1], r_ref_16_shru1[SL16], r_ref_16_shl1[SL16], r_ref_16_shru2[SL16], r_ref_16_shl2[SL16+1], r_ref_16_or1[OL16], r_ref_16_or2[OL16+1], r_psad1[PL16+1], r_psad2[PL16+1], r_add_16[AL16+1] |
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.rotp p_ld_16[LL16], p_sh_16[SL16], p_or_16[OL16], p_psad_16[PL16], p_add1_16[AL16], p_add2_16[AL16] |
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.L_loop16: |
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{.mmi |
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(p_ld_16[0]) ld8 r_cur_ld1[0] = [r14], r16 // Cur load first 8 Byte |
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(p_ld_16[0]) ld8 r_cur_ld2[0] = [r18], r16 // Cur load next 8 Byte |
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(p_psad_16[0]) psad1 r_psad1[0] = r_cur_ld1[LL16+SL16+OL16], r_ref_16_or2[0] // psad of cur and ref |
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} |
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{.mmi |
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(p_ld_16[0]) ld8 r_ref_16_ld1[0] = [r15], r16 // Ref load first 8 Byte (unaligned) |
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(p_ld_16[0]) ld8 r_ref_16_ld2[0] = [r19], r16 // Ref load next 8 Byte (unaligned) |
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(p_psad_16[0]) psad1 r_psad2[0] = r_cur_ld2[LL16+SL16+OL16], r_ref_16_or2[OL16] // psad of cur_2 and ref_2 |
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} |
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{.mii |
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(p_ld_16[0]) ld8 r_ref_16_ld3[0] = [r27], r16 // Ref load third 8 Byte (unaligned) |
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(p_or_16[0]) or r_ref_16_or1[0] = r_ref_16_shl1[0], r_ref_16_shru2[0] // Ref or r_ref_16_shl1 + 1 and r_ref_16_shl1 + 1 |
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(p_sh_16[0]) shr.u r_ref_16_shru1[0] = r_ref_16_ld1[LL16], r23 // Ref shift |
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} |
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{.mii |
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(p_or_16[0]) or r_ref_16_or2[0] = r_ref_16_shl2[0], r_ref_16_shl2[SL16] // Ref or r_ref_shru2 + 1 and r_ref_shl2 + 1 |
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(p_sh_16[0]) shl r_ref_16_shl1[0] = r_ref_16_ld2[LL16], r25 // Ref shift |
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(p_sh_16[0]) shr.u r_ref_16_shru2[0] = r_ref_16_ld2[LL16], r23 // Ref shift |
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} |
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{.mib |
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(p_add2_16[0]) cmp.ge.unc p6, p7 = r8, r17 |
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(p_sh_16[0]) shl r_ref_16_shl2[0]= r_ref_16_ld3[LL16], r25 // Ref shift |
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(p6) br.spnt.few .L_loop_exit16 |
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} |
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{.mmb |
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(p_add1_16[0]) add r_add_16[0] = r_psad1[PL16], r_psad2[PL16] // add the psad results |
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(p_add2_16[0]) add r8 = r8, r_add_16[AL16] // add the results to the sum |
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br.ctop.sptk.few .L_loop16 |
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;; |
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} |
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.L_loop_exit16: |
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// Restore LC and predicates |
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mov ar.lc = r20 |
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mov pr = r21,-1 |
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// Return |
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br.ret.sptk.many rp |
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.endp sad16_ia64# |
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// ------------------------------------------------------------------------------ |
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// * SAD8_IA64 |
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// * |
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// * In: |
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// * r32 = cur (aligned) |
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// * r33 = ref (not aligned) |
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// * r34 = stride |
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// * Out: |
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// * r8 = sum of absolute differences |
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// * |
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// ------------------------------------------------------------------------------ |
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.align 16 |
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.global sad8_ia64# |
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.proc sad8_ia64# |
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sad8_ia64: |
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// Define Latencies |
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LL8=3 // load latency |
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SL8=1 // shift latency |
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OL8=1 // or latency |
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PL8=1 // psad latency |
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AL8=1 // add latency |
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// Allocate Registers in RSE |
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alloc r9 = ar.pfs,3,21,0,24 |
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// lfetch [r32] // Maybe this helps? |
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mov r8 = r0 // Initialize result |
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mov r14 = r32 // Save Cur |
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and r15 = -8, r33 // Align the Ref pointer by deleting the last 3 bit |
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mov r16 = r34 // Save Stride |
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// Save LC and predicates |
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mov r20 = ar.lc |
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mov r21 = pr |
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dep.z r23 = r33, 3, 3 // get the # of bits ref is misaligned |
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;; |
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add r19 = 8, r15 // Precalculate second load-offset |
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sub r25 = 64, r23 // Precalculate # of shifts |
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// Initialize Loop-Counters |
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mov ar.lc = 7 // Loop 7 times |
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mov ar.ec = LL8 + SL8 + OL8 + PL8 + AL8 // Epiloque |
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mov pr.rot = 1 << 16 // Reset Predicate Registers and initialize with P16 |
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// Initalize Arrays for Register Rotation |
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.rotr r_cur_ld[LL8+SL8+OL8+1], r_ref_ld1[LL8+1], r_ref_ld2[LL8+1], r_shru[SL8+1], r_shl[SL8+1], r_or[OL8+1], r_psad[PL8+1] |
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.rotp p_ld[LL8], p_sh[SL8], p_or[OL8], p_psad[PL8], p_add[AL8] |
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;; |
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.L_loop8: |
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// {.mmi |
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(p_ld[0]) ld8 r_ref_ld1[0] = [r15], r16 // Load 1st 8Byte from Ref |
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(p_ld[0]) ld8 r_cur_ld[0] = [r14], r16 // Load Cur |
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(p_psad[0]) psad1 r_psad[0] = r_cur_ld[LL8+SL8+OL8], r_or[OL8] // Do the Calculation |
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// } |
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// {.mii |
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(p_ld[0]) ld8 r_ref_ld2[0] = [r19], r16 // Load 2nd 8Byte from Ref |
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(p_sh[0]) shr.u r_shru[0] = r_ref_ld1[LL8], r23 // Shift unaligned Ref parts |
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(p_sh[0]) shl r_shl[0] = r_ref_ld2[LL8], r25 // Shift unaligned Ref parts |
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// } |
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// {.mib |
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(p_or[0]) or r_or[0] = r_shru[SL8], r_shl[SL8] // Combine unaligned Ref parts |
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(p_add[0]) add r8 = r8, r_psad[PL8] // Sum psad result |
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br.ctop.sptk.few .L_loop8 |
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;; |
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// } |
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// Restore Loop counters |
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mov ar.lc = r20 |
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mov pr = r21,-1 |
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// Return |
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br.ret.sptk.many b0 |
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.endp sad8_ia64# |
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.common sad16bi#,8,8 |
.common sad16bi#,8,8 |
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.align 16 |
.align 16 |
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.global sad16bi_ia64# |
.global sad16bi_ia64# |
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} |
} |
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{.mib |
{.mib |
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add mean0 = mean0, mean1 |
add mean0 = mean0, mean1 |
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// add mean2 = 127, mean2 // this could make our division more exact, but does not help much |
// add mean2 = 127, mean2 // this could make our division more exactly, but does not help much |
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;; |
;; |
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} |
} |
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{.mib |
{.mib |
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br.ret.sptk.many b0 |
br.ret.sptk.many b0 |
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} |
} |
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.endp dev16_ia64# |
.endp dev16_ia64# |
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// ########################################################### |
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// ########################################################### |
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// Neue version von gruppe 01 ################################ |
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// ########################################################### |
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// ########################################################### |
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.text |
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.align 16 |
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.global sad16_ia64# |
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.proc sad16_ia64# |
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sad16_ia64: |
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alloc r1 = ar.pfs, 4, 76, 0, 0 |
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mov r2 = pr |
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dep r14 = r0, r33, 0, 3 // r14 = (r33 div 8)*8 (aligned version of ref) |
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dep.z r31 = r33, 0, 3 // r31 = r33 mod 8 (misalignment of ref) |
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;; |
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mov r64 = r34 //(1) calculate multiples of stride |
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shl r65 = r34, 1 //(2) for being able to load all the |
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shladd r66 = r34, 1, r34 //(3) data at once |
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shl r67 = r34, 2 //(4) |
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shladd r68 = r34, 2, r34 //(5) |
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shl r71 = r34, 3 //(8) |
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shladd r72 = r34, 3, r34 //(9) |
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;; |
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shl r69 = r66, 1 //(6) |
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shladd r70 = r66, 1, r34 //(7) |
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shl r73 = r68, 1 //(10) |
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shladd r74 = r68, 1, r34 //(11) |
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shl r75 = r66, 2 //(12) |
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shladd r76 = r66, 2, r34 //(13) |
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shladd r77 = r66, 2, r65 //(14) |
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shladd r78 = r66, 2, r66 //(15) |
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;; |
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cmp.eq p16, p17 = 0, r31 // prepare predicates according to the misalignment |
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cmp.eq p18, p19 = 2, r31 // ref |
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cmp.eq p20, p21 = 4, r31 |
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cmp.eq p22, p23 = 6, r31 |
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cmp.eq p24, p25 = 1, r31 |
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cmp.eq p26, p27 = 3, r31 |
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cmp.eq p28, p29 = 5, r31 |
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mov r96 = r14 // and calculate all the adresses where we have |
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mov r33 = r32 // to load from |
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add r97 = r14, r64 |
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add r35 = r32, r64 |
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add r98 = r14, r65 |
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add r37 = r32, r65 |
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add r99 = r14, r66 |
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add r39 = r32, r66 |
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add r100 = r14, r67 |
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add r41 = r32, r67 |
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add r101 = r14, r68 |
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add r43 = r32, r68 |
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add r102 = r14, r69 |
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add r45 = r32, r69 |
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add r103 = r14, r70 |
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add r47 = r32, r70 |
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add r104 = r14, r71 |
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add r49 = r32, r71 |
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add r105 = r14, r72 |
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add r51 = r32, r72 |
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add r106 = r14, r73 |
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add r53 = r32, r73 |
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add r107 = r14, r74 |
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add r55 = r32, r74 |
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add r108 = r14, r75 |
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add r57 = r32, r75 |
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add r109 = r14, r76 |
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add r59 = r32, r76 |
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add r110 = r14, r77 |
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add r61 = r32, r77 |
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add r111 = r14, r78 |
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add r63 = r32, r78 |
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;; |
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ld8 r32 = [r33], 8 // Load all the data which is needed for the sad |
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ld8 r34 = [r35], 8 // in the registers. the goal is to have the array |
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ld8 r36 = [r37], 8 // adressed by cur in the registers r32 - r63 and |
| 616 |
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ld8 r38 = [r39], 8 // the aray adressed by ref in the registers |
| 617 |
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ld8 r40 = [r41], 8 // r64 - r95. The registers r96 - r111 are needed |
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ld8 r42 = [r43], 8 // to load the aligned 24 bits in which the |
| 619 |
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ld8 r44 = [r45], 8 // needed misaligned 16 bits must be. |
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ld8 r46 = [r47], 8 // After loading we start a preprocessing which |
| 621 |
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ld8 r48 = [r49], 8 // guarantees that the data adressed by ref is in |
| 622 |
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ld8 r50 = [r51], 8 // the registers r64 - r95. |
| 623 |
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ld8 r52 = [r53], 8 |
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ld8 r54 = [r55], 8 |
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ld8 r56 = [r57], 8 |
| 626 |
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ld8 r58 = [r59], 8 |
| 627 |
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ld8 r60 = [r61], 8 |
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ld8 r62 = [r63], 8 |
| 629 |
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ld8 r64 = [r96], 8 |
| 630 |
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ld8 r66 = [r97], 8 |
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ld8 r68 = [r98], 8 |
| 632 |
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ld8 r70 = [r99], 8 |
| 633 |
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ld8 r72 = [r100], 8 |
| 634 |
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ld8 r74 = [r101], 8 |
| 635 |
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ld8 r76 = [r102], 8 |
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ld8 r78 = [r103], 8 |
| 637 |
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ld8 r80 = [r104], 8 |
| 638 |
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ld8 r82 = [r105], 8 |
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ld8 r84 = [r106], 8 |
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ld8 r86 = [r107], 8 |
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ld8 r88 = [r108], 8 |
| 642 |
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ld8 r90 = [r109], 8 |
| 643 |
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ld8 r92 = [r110], 8 |
| 644 |
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ld8 r94 = [r111], 8 |
| 645 |
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;; |
| 646 |
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ld8 r33 = [r33] |
| 647 |
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ld8 r35 = [r35] |
| 648 |
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ld8 r37 = [r37] |
| 649 |
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ld8 r39 = [r39] |
| 650 |
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ld8 r41 = [r41] |
| 651 |
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ld8 r43 = [r43] |
| 652 |
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ld8 r45 = [r45] |
| 653 |
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ld8 r47 = [r47] |
| 654 |
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ld8 r49 = [r49] |
| 655 |
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ld8 r51 = [r51] |
| 656 |
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ld8 r53 = [r53] |
| 657 |
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ld8 r55 = [r55] |
| 658 |
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ld8 r57 = [r57] |
| 659 |
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ld8 r59 = [r59] |
| 660 |
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ld8 r61 = [r61] |
| 661 |
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ld8 r63 = [r63] |
| 662 |
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ld8 r65 = [r96], 8 |
| 663 |
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ld8 r67 = [r97], 8 |
| 664 |
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ld8 r69 = [r98], 8 |
| 665 |
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ld8 r71 = [r99], 8 |
| 666 |
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ld8 r73 = [r100], 8 |
| 667 |
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ld8 r75 = [r101], 8 |
| 668 |
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ld8 r77 = [r102], 8 |
| 669 |
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ld8 r79 = [r103], 8 |
| 670 |
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ld8 r81 = [r104], 8 |
| 671 |
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ld8 r83 = [r105], 8 |
| 672 |
|
ld8 r85 = [r106], 8 |
| 673 |
|
ld8 r87 = [r107], 8 |
| 674 |
|
ld8 r89 = [r108], 8 |
| 675 |
|
ld8 r91 = [r109], 8 |
| 676 |
|
ld8 r93 = [r110], 8 |
| 677 |
|
ld8 r95 = [r111], 8 |
| 678 |
|
(p16) br.cond.dptk.many .Lber // If ref is aligned, everything is loaded and we can start the calculation |
| 679 |
|
;; |
| 680 |
|
ld8 r96 = [r96] // If not, we have to load a bit more |
| 681 |
|
ld8 r97 = [r97] |
| 682 |
|
ld8 r98 = [r98] |
| 683 |
|
ld8 r99 = [r99] |
| 684 |
|
ld8 r100 = [r100] |
| 685 |
|
ld8 r101 = [r101] |
| 686 |
|
ld8 r102 = [r102] |
| 687 |
|
ld8 r103 = [r103] |
| 688 |
|
ld8 r104 = [r104] |
| 689 |
|
ld8 r105 = [r105] |
| 690 |
|
ld8 r106 = [r106] |
| 691 |
|
ld8 r107 = [r107] |
| 692 |
|
ld8 r108 = [r108] |
| 693 |
|
ld8 r109 = [r109] |
| 694 |
|
ld8 r110 = [r110] |
| 695 |
|
ld8 r111 = [r111] |
| 696 |
|
(p24) br.cond.dptk.many .Lmod1 // according to the misalignment, we have |
| 697 |
|
(p18) br.cond.dpnt.many .Lmod2 // to jump to different preprocessing routines |
| 698 |
|
(p26) br.cond.dpnt.many .Lmod3 |
| 699 |
|
(p20) br.cond.dpnt.many .Lmod4 |
| 700 |
|
(p28) br.cond.dpnt.many .Lmod5 |
| 701 |
|
(p22) br.cond.dpnt.many .Lmod6 |
| 702 |
|
;; |
| 703 |
|
.Lmod7: // this jump point is not needed |
| 704 |
|
shrp r64 = r65, r64, 56 // in these blocks, we do the preprocessing |
| 705 |
|
shrp r65 = r96, r65, 56 |
| 706 |
|
shrp r66 = r67, r66, 56 |
| 707 |
|
shrp r67 = r97, r67, 56 |
| 708 |
|
shrp r68 = r69, r68, 56 |
| 709 |
|
shrp r69 = r98, r69, 56 |
| 710 |
|
shrp r70 = r71, r70, 56 |
| 711 |
|
shrp r71 = r99, r71, 56 |
| 712 |
|
shrp r72 = r73, r72, 56 |
| 713 |
|
shrp r73 = r100, r73, 56 |
| 714 |
|
shrp r74 = r75, r74, 56 |
| 715 |
|
shrp r75 = r101, r75, 56 |
| 716 |
|
shrp r76 = r77, r76, 56 |
| 717 |
|
shrp r77 = r102, r77, 56 |
| 718 |
|
shrp r78 = r79, r78, 56 |
| 719 |
|
shrp r79 = r103, r79, 56 |
| 720 |
|
shrp r80 = r81, r80, 56 |
| 721 |
|
shrp r81 = r104, r81, 56 |
| 722 |
|
shrp r82 = r83, r82, 56 |
| 723 |
|
shrp r83 = r105, r83, 56 |
| 724 |
|
shrp r84 = r85, r84, 56 |
| 725 |
|
shrp r85 = r106, r85, 56 |
| 726 |
|
shrp r86 = r87, r86, 56 |
| 727 |
|
shrp r87 = r107, r87, 56 |
| 728 |
|
shrp r88 = r89, r88, 56 |
| 729 |
|
shrp r89 = r108, r89, 56 |
| 730 |
|
shrp r90 = r91, r90, 56 |
| 731 |
|
shrp r91 = r109, r91, 56 |
| 732 |
|
shrp r92 = r93, r92, 56 |
| 733 |
|
shrp r93 = r110, r93, 56 |
| 734 |
|
shrp r94 = r95, r94, 56 |
| 735 |
|
shrp r95 = r111, r95, 56 |
| 736 |
|
br.cond.sptk.many .Lber // and then we jump to the calculation |
| 737 |
|
;; |
| 738 |
|
.Lmod6: |
| 739 |
|
shrp r64 = r65, r64, 48 |
| 740 |
|
shrp r65 = r96, r65, 48 |
| 741 |
|
shrp r66 = r67, r66, 48 |
| 742 |
|
shrp r67 = r97, r67, 48 |
| 743 |
|
shrp r68 = r69, r68, 48 |
| 744 |
|
shrp r69 = r98, r69, 48 |
| 745 |
|
shrp r70 = r71, r70, 48 |
| 746 |
|
shrp r71 = r99, r71, 48 |
| 747 |
|
shrp r72 = r73, r72, 48 |
| 748 |
|
shrp r73 = r100, r73, 48 |
| 749 |
|
shrp r74 = r75, r74, 48 |
| 750 |
|
shrp r75 = r101, r75, 48 |
| 751 |
|
shrp r76 = r77, r76, 48 |
| 752 |
|
shrp r77 = r102, r77, 48 |
| 753 |
|
shrp r78 = r79, r78, 48 |
| 754 |
|
shrp r79 = r103, r79, 48 |
| 755 |
|
shrp r80 = r81, r80, 48 |
| 756 |
|
shrp r81 = r104, r81, 48 |
| 757 |
|
shrp r82 = r83, r82, 48 |
| 758 |
|
shrp r83 = r105, r83, 48 |
| 759 |
|
shrp r84 = r85, r84, 48 |
| 760 |
|
shrp r85 = r106, r85, 48 |
| 761 |
|
shrp r86 = r87, r86, 48 |
| 762 |
|
shrp r87 = r107, r87, 48 |
| 763 |
|
shrp r88 = r89, r88, 48 |
| 764 |
|
shrp r89 = r108, r89, 48 |
| 765 |
|
shrp r90 = r91, r90, 48 |
| 766 |
|
shrp r91 = r109, r91, 48 |
| 767 |
|
shrp r92 = r93, r92, 48 |
| 768 |
|
shrp r93 = r110, r93, 48 |
| 769 |
|
shrp r94 = r95, r94, 48 |
| 770 |
|
shrp r95 = r111, r95, 48 |
| 771 |
|
br.cond.sptk.many .Lber |
| 772 |
|
;; |
| 773 |
|
.Lmod5: |
| 774 |
|
shrp r64 = r65, r64, 40 |
| 775 |
|
shrp r65 = r96, r65, 40 |
| 776 |
|
shrp r66 = r67, r66, 40 |
| 777 |
|
shrp r67 = r97, r67, 40 |
| 778 |
|
shrp r68 = r69, r68, 40 |
| 779 |
|
shrp r69 = r98, r69, 40 |
| 780 |
|
shrp r70 = r71, r70, 40 |
| 781 |
|
shrp r71 = r99, r71, 40 |
| 782 |
|
shrp r72 = r73, r72, 40 |
| 783 |
|
shrp r73 = r100, r73, 40 |
| 784 |
|
shrp r74 = r75, r74, 40 |
| 785 |
|
shrp r75 = r101, r75, 40 |
| 786 |
|
shrp r76 = r77, r76, 40 |
| 787 |
|
shrp r77 = r102, r77, 40 |
| 788 |
|
shrp r78 = r79, r78, 40 |
| 789 |
|
shrp r79 = r103, r79, 40 |
| 790 |
|
shrp r80 = r81, r80, 40 |
| 791 |
|
shrp r81 = r104, r81, 40 |
| 792 |
|
shrp r82 = r83, r82, 40 |
| 793 |
|
shrp r83 = r105, r83, 40 |
| 794 |
|
shrp r84 = r85, r84, 40 |
| 795 |
|
shrp r85 = r106, r85, 40 |
| 796 |
|
shrp r86 = r87, r86, 40 |
| 797 |
|
shrp r87 = r107, r87, 40 |
| 798 |
|
shrp r88 = r89, r88, 40 |
| 799 |
|
shrp r89 = r108, r89, 40 |
| 800 |
|
shrp r90 = r91, r90, 40 |
| 801 |
|
shrp r91 = r109, r91, 40 |
| 802 |
|
shrp r92 = r93, r92, 40 |
| 803 |
|
shrp r93 = r110, r93, 40 |
| 804 |
|
shrp r94 = r95, r94, 40 |
| 805 |
|
shrp r95 = r111, r95, 40 |
| 806 |
|
br.cond.sptk.many .Lber |
| 807 |
|
;; |
| 808 |
|
.Lmod4: |
| 809 |
|
shrp r64 = r65, r64, 32 |
| 810 |
|
shrp r65 = r96, r65, 32 |
| 811 |
|
shrp r66 = r67, r66, 32 |
| 812 |
|
shrp r67 = r97, r67, 32 |
| 813 |
|
shrp r68 = r69, r68, 32 |
| 814 |
|
shrp r69 = r98, r69, 32 |
| 815 |
|
shrp r70 = r71, r70, 32 |
| 816 |
|
shrp r71 = r99, r71, 32 |
| 817 |
|
shrp r72 = r73, r72, 32 |
| 818 |
|
shrp r73 = r100, r73, 32 |
| 819 |
|
shrp r74 = r75, r74, 32 |
| 820 |
|
shrp r75 = r101, r75, 32 |
| 821 |
|
shrp r76 = r77, r76, 32 |
| 822 |
|
shrp r77 = r102, r77, 32 |
| 823 |
|
shrp r78 = r79, r78, 32 |
| 824 |
|
shrp r79 = r103, r79, 32 |
| 825 |
|
shrp r80 = r81, r80, 32 |
| 826 |
|
shrp r81 = r104, r81, 32 |
| 827 |
|
shrp r82 = r83, r82, 32 |
| 828 |
|
shrp r83 = r105, r83, 32 |
| 829 |
|
shrp r84 = r85, r84, 32 |
| 830 |
|
shrp r85 = r106, r85, 32 |
| 831 |
|
shrp r86 = r87, r86, 32 |
| 832 |
|
shrp r87 = r107, r87, 32 |
| 833 |
|
shrp r88 = r89, r88, 32 |
| 834 |
|
shrp r89 = r108, r89, 32 |
| 835 |
|
shrp r90 = r91, r90, 32 |
| 836 |
|
shrp r91 = r109, r91, 32 |
| 837 |
|
shrp r92 = r93, r92, 32 |
| 838 |
|
shrp r93 = r110, r93, 32 |
| 839 |
|
shrp r94 = r95, r94, 32 |
| 840 |
|
shrp r95 = r111, r95, 32 |
| 841 |
|
br.cond.sptk.many .Lber |
| 842 |
|
;; |
| 843 |
|
.Lmod3: |
| 844 |
|
shrp r64 = r65, r64, 24 |
| 845 |
|
shrp r65 = r96, r65, 24 |
| 846 |
|
shrp r66 = r67, r66, 24 |
| 847 |
|
shrp r67 = r97, r67, 24 |
| 848 |
|
shrp r68 = r69, r68, 24 |
| 849 |
|
shrp r69 = r98, r69, 24 |
| 850 |
|
shrp r70 = r71, r70, 24 |
| 851 |
|
shrp r71 = r99, r71, 24 |
| 852 |
|
shrp r72 = r73, r72, 24 |
| 853 |
|
shrp r73 = r100, r73, 24 |
| 854 |
|
shrp r74 = r75, r74, 24 |
| 855 |
|
shrp r75 = r101, r75, 24 |
| 856 |
|
shrp r76 = r77, r76, 24 |
| 857 |
|
shrp r77 = r102, r77, 24 |
| 858 |
|
shrp r78 = r79, r78, 24 |
| 859 |
|
shrp r79 = r103, r79, 24 |
| 860 |
|
shrp r80 = r81, r80, 24 |
| 861 |
|
shrp r81 = r104, r81, 24 |
| 862 |
|
shrp r82 = r83, r82, 24 |
| 863 |
|
shrp r83 = r105, r83, 24 |
| 864 |
|
shrp r84 = r85, r84, 24 |
| 865 |
|
shrp r85 = r106, r85, 24 |
| 866 |
|
shrp r86 = r87, r86, 24 |
| 867 |
|
shrp r87 = r107, r87, 24 |
| 868 |
|
shrp r88 = r89, r88, 24 |
| 869 |
|
shrp r89 = r108, r89, 24 |
| 870 |
|
shrp r90 = r91, r90, 24 |
| 871 |
|
shrp r91 = r109, r91, 24 |
| 872 |
|
shrp r92 = r93, r92, 24 |
| 873 |
|
shrp r93 = r110, r93, 24 |
| 874 |
|
shrp r94 = r95, r94, 24 |
| 875 |
|
shrp r95 = r111, r95, 24 |
| 876 |
|
br.cond.sptk.many .Lber |
| 877 |
|
;; |
| 878 |
|
.Lmod2: |
| 879 |
|
shrp r64 = r65, r64, 16 |
| 880 |
|
shrp r65 = r96, r65, 16 |
| 881 |
|
shrp r66 = r67, r66, 16 |
| 882 |
|
shrp r67 = r97, r67, 16 |
| 883 |
|
shrp r68 = r69, r68, 16 |
| 884 |
|
shrp r69 = r98, r69, 16 |
| 885 |
|
shrp r70 = r71, r70, 16 |
| 886 |
|
shrp r71 = r99, r71, 16 |
| 887 |
|
shrp r72 = r73, r72, 16 |
| 888 |
|
shrp r73 = r100, r73, 16 |
| 889 |
|
shrp r74 = r75, r74, 16 |
| 890 |
|
shrp r75 = r101, r75, 16 |
| 891 |
|
shrp r76 = r77, r76, 16 |
| 892 |
|
shrp r77 = r102, r77, 16 |
| 893 |
|
shrp r78 = r79, r78, 16 |
| 894 |
|
shrp r79 = r103, r79, 16 |
| 895 |
|
shrp r80 = r81, r80, 16 |
| 896 |
|
shrp r81 = r104, r81, 16 |
| 897 |
|
shrp r82 = r83, r82, 16 |
| 898 |
|
shrp r83 = r105, r83, 16 |
| 899 |
|
shrp r84 = r85, r84, 16 |
| 900 |
|
shrp r85 = r106, r85, 16 |
| 901 |
|
shrp r86 = r87, r86, 16 |
| 902 |
|
shrp r87 = r107, r87, 16 |
| 903 |
|
shrp r88 = r89, r88, 16 |
| 904 |
|
shrp r89 = r108, r89, 16 |
| 905 |
|
shrp r90 = r91, r90, 16 |
| 906 |
|
shrp r91 = r109, r91, 16 |
| 907 |
|
shrp r92 = r93, r92, 16 |
| 908 |
|
shrp r93 = r110, r93, 16 |
| 909 |
|
shrp r94 = r95, r94, 16 |
| 910 |
|
shrp r95 = r111, r95, 16 |
| 911 |
|
br.cond.sptk.many .Lber |
| 912 |
|
;; |
| 913 |
|
.Lmod1: |
| 914 |
|
shrp r64 = r65, r64, 8 |
| 915 |
|
shrp r65 = r96, r65, 8 |
| 916 |
|
shrp r66 = r67, r66, 8 |
| 917 |
|
shrp r67 = r97, r67, 8 |
| 918 |
|
shrp r68 = r69, r68, 8 |
| 919 |
|
shrp r69 = r98, r69, 8 |
| 920 |
|
shrp r70 = r71, r70, 8 |
| 921 |
|
shrp r71 = r99, r71, 8 |
| 922 |
|
shrp r72 = r73, r72, 8 |
| 923 |
|
shrp r73 = r100, r73, 8 |
| 924 |
|
shrp r74 = r75, r74, 8 |
| 925 |
|
shrp r75 = r101, r75, 8 |
| 926 |
|
shrp r76 = r77, r76, 8 |
| 927 |
|
shrp r77 = r102, r77, 8 |
| 928 |
|
shrp r78 = r79, r78, 8 |
| 929 |
|
shrp r79 = r103, r79, 8 |
| 930 |
|
shrp r80 = r81, r80, 8 |
| 931 |
|
shrp r81 = r104, r81, 8 |
| 932 |
|
shrp r82 = r83, r82, 8 |
| 933 |
|
shrp r83 = r105, r83, 8 |
| 934 |
|
shrp r84 = r85, r84, 8 |
| 935 |
|
shrp r85 = r106, r85, 8 |
| 936 |
|
shrp r86 = r87, r86, 8 |
| 937 |
|
shrp r87 = r107, r87, 8 |
| 938 |
|
shrp r88 = r89, r88, 8 |
| 939 |
|
shrp r89 = r108, r89, 8 |
| 940 |
|
shrp r90 = r91, r90, 8 |
| 941 |
|
shrp r91 = r109, r91, 8 |
| 942 |
|
shrp r92 = r93, r92, 8 |
| 943 |
|
shrp r93 = r110, r93, 8 |
| 944 |
|
shrp r94 = r95, r94, 8 |
| 945 |
|
shrp r95 = r111, r95, 8 |
| 946 |
|
.Lber: |
| 947 |
|
;; |
| 948 |
|
psad1 r32 = r32, r64 // Here we do the calculation. |
| 949 |
|
psad1 r33 = r33, r65 // The machine is providing a fast method |
| 950 |
|
psad1 r34 = r34, r66 // for calculating sad, so we use it |
| 951 |
|
psad1 r35 = r35, r67 |
| 952 |
|
psad1 r36 = r36, r68 |
| 953 |
|
psad1 r37 = r37, r69 |
| 954 |
|
psad1 r38 = r38, r70 |
| 955 |
|
psad1 r39 = r39, r71 |
| 956 |
|
psad1 r40 = r40, r72 |
| 957 |
|
psad1 r41 = r41, r73 |
| 958 |
|
psad1 r42 = r42, r74 |
| 959 |
|
psad1 r43 = r43, r75 |
| 960 |
|
psad1 r44 = r44, r76 |
| 961 |
|
psad1 r45 = r45, r77 |
| 962 |
|
psad1 r46 = r46, r78 |
| 963 |
|
psad1 r47 = r47, r79 |
| 964 |
|
psad1 r48 = r48, r80 |
| 965 |
|
psad1 r49 = r49, r81 |
| 966 |
|
psad1 r50 = r50, r82 |
| 967 |
|
psad1 r51 = r51, r83 |
| 968 |
|
psad1 r52 = r52, r84 |
| 969 |
|
psad1 r53 = r53, r85 |
| 970 |
|
psad1 r54 = r54, r86 |
| 971 |
|
psad1 r55 = r55, r87 |
| 972 |
|
psad1 r56 = r56, r88 |
| 973 |
|
psad1 r57 = r57, r89 |
| 974 |
|
psad1 r58 = r58, r90 |
| 975 |
|
psad1 r59 = r59, r91 |
| 976 |
|
psad1 r60 = r60, r92 |
| 977 |
|
psad1 r61 = r61, r93 |
| 978 |
|
psad1 r62 = r62, r94 |
| 979 |
|
psad1 r63 = r63, r95 |
| 980 |
|
;; |
| 981 |
|
add r32 = r32, r63 // at last, we have to sum up |
| 982 |
|
add r33 = r33, r62 // in 5 stages |
| 983 |
|
add r34 = r34, r61 |
| 984 |
|
add r35 = r35, r60 |
| 985 |
|
add r36 = r36, r59 |
| 986 |
|
add r37 = r37, r58 |
| 987 |
|
add r38 = r38, r57 |
| 988 |
|
add r39 = r39, r56 |
| 989 |
|
add r40 = r40, r55 |
| 990 |
|
add r41 = r41, r54 |
| 991 |
|
add r42 = r42, r53 |
| 992 |
|
add r43 = r43, r52 |
| 993 |
|
add r44 = r44, r51 |
| 994 |
|
add r45 = r45, r50 |
| 995 |
|
add r46 = r46, r49 |
| 996 |
|
add r47 = r47, r48 |
| 997 |
|
;; |
| 998 |
|
add r32 = r32, r47 |
| 999 |
|
add r33 = r33, r46 |
| 1000 |
|
add r34 = r34, r45 |
| 1001 |
|
add r35 = r35, r44 |
| 1002 |
|
add r36 = r36, r43 |
| 1003 |
|
add r37 = r37, r42 |
| 1004 |
|
add r38 = r38, r41 |
| 1005 |
|
add r39 = r39, r40 |
| 1006 |
|
;; |
| 1007 |
|
add r32 = r32, r39 |
| 1008 |
|
add r33 = r33, r38 |
| 1009 |
|
add r34 = r34, r37 |
| 1010 |
|
add r35 = r35, r36 |
| 1011 |
|
;; |
| 1012 |
|
add r32 = r32, r35 |
| 1013 |
|
add r33 = r33, r34 |
| 1014 |
|
;; |
| 1015 |
|
add r8 = r32, r33 // and store the result in r8 |
| 1016 |
|
mov pr = r2, -1 |
| 1017 |
|
mov ar.pfs = r1 |
| 1018 |
|
br.ret.sptk.many b0 |
| 1019 |
|
.endp sad16_ia64# |
| 1020 |
|
|
| 1021 |
|
|
| 1022 |
|
|
| 1023 |
|
|
| 1024 |
|
.align 16 |
| 1025 |
|
.global sad8_ia64# |
| 1026 |
|
.proc sad8_ia64# |
| 1027 |
|
sad8_ia64: |
| 1028 |
|
alloc r1 = ar.pfs, 3, 21, 0, 0 |
| 1029 |
|
mov r2 = pr |
| 1030 |
|
dep r14 = r0, r33, 0, 3 // calculate aligned version of ref |
| 1031 |
|
dep.z r31 = r33, 0, 3 // calculate misalignment of ref |
| 1032 |
|
;; |
| 1033 |
|
mov r40 = r34 //(1) calculate multiples of stride |
| 1034 |
|
shl r41 = r34, 1 //(2) |
| 1035 |
|
shladd r42 = r34, 1, r34 //(3) |
| 1036 |
|
shl r43 = r34, 2 //(4) |
| 1037 |
|
shladd r44 = r34, 2, r34 //(5) |
| 1038 |
|
;; |
| 1039 |
|
cmp.eq p16, p17 = 0, r31 // set predicates according to the misalignment of ref |
| 1040 |
|
cmp.eq p18, p19 = 2, r31 |
| 1041 |
|
shl r45 = r42, 1 //(6) |
| 1042 |
|
cmp.eq p20, p21 = 4, r31 |
| 1043 |
|
cmp.eq p22, p23 = 6, r31 |
| 1044 |
|
shladd r46 = r42, 1, r34 //(7) |
| 1045 |
|
cmp.eq p24, p25 = 1, r31 |
| 1046 |
|
cmp.eq p26, p27 = 3, r31 |
| 1047 |
|
cmp.eq p28, p29 = 5, r31 |
| 1048 |
|
;; |
| 1049 |
|
mov r48 = r14 // calculate memory adresses of data |
| 1050 |
|
add r33 = r32, r40 |
| 1051 |
|
add r49 = r14, r40 |
| 1052 |
|
add r34 = r32, r41 |
| 1053 |
|
add r50 = r14, r41 |
| 1054 |
|
add r35 = r32, r42 |
| 1055 |
|
add r51 = r14, r42 |
| 1056 |
|
add r36 = r32, r43 |
| 1057 |
|
add r52 = r14, r43 |
| 1058 |
|
add r37 = r32, r44 |
| 1059 |
|
add r53 = r14, r44 |
| 1060 |
|
add r38 = r32, r45 |
| 1061 |
|
add r54 = r14, r45 |
| 1062 |
|
add r39 = r32, r46 |
| 1063 |
|
add r55 = r14, r46 |
| 1064 |
|
;; |
| 1065 |
|
ld8 r32 = [r32] // load everythingund alles wird geladen |
| 1066 |
|
ld8 r33 = [r33] // cur is located in r32 - r39 |
| 1067 |
|
ld8 r34 = [r34] // ref in r40 - r47 |
| 1068 |
|
ld8 r35 = [r35] |
| 1069 |
|
ld8 r36 = [r36] |
| 1070 |
|
ld8 r37 = [r37] |
| 1071 |
|
ld8 r38 = [r38] |
| 1072 |
|
ld8 r39 = [r39] |
| 1073 |
|
ld8 r40 = [r48] ,8 |
| 1074 |
|
ld8 r41 = [r49] ,8 |
| 1075 |
|
ld8 r42 = [r50] ,8 |
| 1076 |
|
ld8 r43 = [r51] ,8 |
| 1077 |
|
ld8 r44 = [r52] ,8 |
| 1078 |
|
ld8 r45 = [r53] ,8 |
| 1079 |
|
ld8 r46 = [r54] ,8 |
| 1080 |
|
ld8 r47 = [r55] ,8 |
| 1081 |
|
(p16) br.cond.dptk.many .Lber2 // if ref is aligned, we can start the calculation |
| 1082 |
|
;; |
| 1083 |
|
ld8 r48 = [r48] // if not, we have to load some more |
| 1084 |
|
ld8 r49 = [r49] // because of the alignment of ld8 |
| 1085 |
|
ld8 r50 = [r50] |
| 1086 |
|
ld8 r51 = [r51] |
| 1087 |
|
ld8 r52 = [r52] |
| 1088 |
|
ld8 r53 = [r53] |
| 1089 |
|
ld8 r54 = [r54] |
| 1090 |
|
ld8 r55 = [r55] |
| 1091 |
|
(p24) br.cond.dptk.many .Lmode1 |
| 1092 |
|
(p18) br.cond.dpnt.many .Lmode2 |
| 1093 |
|
(p26) br.cond.dpnt.many .Lmode3 |
| 1094 |
|
(p20) br.cond.dpnt.many .Lmode4 |
| 1095 |
|
(p28) br.cond.dpnt.many .Lmode5 |
| 1096 |
|
(p22) br.cond.dpnt.many .Lmode6 |
| 1097 |
|
;; |
| 1098 |
|
.Lmode7: // this jump piont is not needed, it is for better understandment |
| 1099 |
|
shrp r40 = r48, r40, 56 // here we do some preprocessing on the data |
| 1100 |
|
shrp r41 = r49, r41, 56 // this is because of the alignment problem of ref |
| 1101 |
|
shrp r42 = r50, r42, 56 |
| 1102 |
|
shrp r43 = r51, r43, 56 |
| 1103 |
|
shrp r44 = r52, r44, 56 |
| 1104 |
|
shrp r45 = r53, r45, 56 |
| 1105 |
|
shrp r46 = r54, r46, 56 |
| 1106 |
|
shrp r47 = r55, r47, 56 |
| 1107 |
|
br.cond.sptk.many .Lber2 |
| 1108 |
|
;; |
| 1109 |
|
.Lmode6: |
| 1110 |
|
shrp r40 = r48, r40, 48 |
| 1111 |
|
shrp r41 = r49, r41, 48 |
| 1112 |
|
shrp r42 = r50, r42, 48 |
| 1113 |
|
shrp r43 = r51, r43, 48 |
| 1114 |
|
shrp r44 = r52, r44, 48 |
| 1115 |
|
shrp r45 = r53, r45, 48 |
| 1116 |
|
shrp r46 = r54, r46, 48 |
| 1117 |
|
shrp r47 = r55, r47, 48 |
| 1118 |
|
br.cond.sptk.many .Lber2 |
| 1119 |
|
;; |
| 1120 |
|
.Lmode5: |
| 1121 |
|
shrp r40 = r48, r40, 40 |
| 1122 |
|
shrp r41 = r49, r41, 40 |
| 1123 |
|
shrp r42 = r50, r42, 40 |
| 1124 |
|
shrp r43 = r51, r43, 40 |
| 1125 |
|
shrp r44 = r52, r44, 40 |
| 1126 |
|
shrp r45 = r53, r45, 40 |
| 1127 |
|
shrp r46 = r54, r46, 40 |
| 1128 |
|
shrp r47 = r55, r47, 40 |
| 1129 |
|
br.cond.sptk.many .Lber2 |
| 1130 |
|
;; |
| 1131 |
|
.Lmode4: |
| 1132 |
|
shrp r40 = r48, r40, 32 |
| 1133 |
|
shrp r41 = r49, r41, 32 |
| 1134 |
|
shrp r42 = r50, r42, 32 |
| 1135 |
|
shrp r43 = r51, r43, 32 |
| 1136 |
|
shrp r44 = r52, r44, 32 |
| 1137 |
|
shrp r45 = r53, r45, 32 |
| 1138 |
|
shrp r46 = r54, r46, 32 |
| 1139 |
|
shrp r47 = r55, r47, 32 |
| 1140 |
|
br.cond.sptk.many .Lber2 |
| 1141 |
|
;; |
| 1142 |
|
.Lmode3: |
| 1143 |
|
shrp r40 = r48, r40, 24 |
| 1144 |
|
shrp r41 = r49, r41, 24 |
| 1145 |
|
shrp r42 = r50, r42, 24 |
| 1146 |
|
shrp r43 = r51, r43, 24 |
| 1147 |
|
shrp r44 = r52, r44, 24 |
| 1148 |
|
shrp r45 = r53, r45, 24 |
| 1149 |
|
shrp r46 = r54, r46, 24 |
| 1150 |
|
shrp r47 = r55, r47, 24 |
| 1151 |
|
br.cond.sptk.many .Lber2 |
| 1152 |
|
;; |
| 1153 |
|
.Lmode2: |
| 1154 |
|
shrp r40 = r48, r40, 16 |
| 1155 |
|
shrp r41 = r49, r41, 16 |
| 1156 |
|
shrp r42 = r50, r42, 16 |
| 1157 |
|
shrp r43 = r51, r43, 16 |
| 1158 |
|
shrp r44 = r52, r44, 16 |
| 1159 |
|
shrp r45 = r53, r45, 16 |
| 1160 |
|
shrp r46 = r54, r46, 16 |
| 1161 |
|
shrp r47 = r55, r47, 16 |
| 1162 |
|
br.cond.sptk.many .Lber2 |
| 1163 |
|
;; |
| 1164 |
|
.Lmode1: |
| 1165 |
|
shrp r40 = r48, r40, 8 |
| 1166 |
|
shrp r41 = r49, r41, 8 |
| 1167 |
|
shrp r42 = r50, r42, 8 |
| 1168 |
|
shrp r43 = r51, r43, 8 |
| 1169 |
|
shrp r44 = r52, r44, 8 |
| 1170 |
|
shrp r45 = r53, r45, 8 |
| 1171 |
|
shrp r46 = r54, r46, 8 |
| 1172 |
|
shrp r47 = r55, r47, 8 |
| 1173 |
|
.Lber2: |
| 1174 |
|
;; |
| 1175 |
|
psad1 r32 = r32, r40 // we start calculating sad |
| 1176 |
|
psad1 r33 = r33, r41 // using th psad1 command of IA64 |
| 1177 |
|
psad1 r34 = r34, r42 |
| 1178 |
|
psad1 r35 = r35, r43 |
| 1179 |
|
psad1 r36 = r36, r44 |
| 1180 |
|
psad1 r37 = r37, r45 |
| 1181 |
|
psad1 r38 = r38, r46 |
| 1182 |
|
psad1 r39 = r39, r47 |
| 1183 |
|
;; |
| 1184 |
|
add r32 = r32, r33 // then we sum up everything |
| 1185 |
|
add r33 = r34, r35 |
| 1186 |
|
add r34 = r36, r37 |
| 1187 |
|
add r35 = r38, r39 |
| 1188 |
|
;; |
| 1189 |
|
add r32 = r32, r33 |
| 1190 |
|
add r33 = r34, r35 |
| 1191 |
|
;; |
| 1192 |
|
add r8 = r32, r33 // and store the result un r8 |
| 1193 |
|
mov pr = r2, -1 |
| 1194 |
|
mov ar.pfs = r1 |
| 1195 |
|
br.ret.sptk.many b0 |
| 1196 |
|
.endp sad8_ia64# |
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