23 |
* |
* |
24 |
* History: |
* History: |
25 |
* |
* |
26 |
|
* 21.04.2002 fixed custom matrix support, tried to get dll size down |
27 |
|
* 17.04.2002 re-enabled lumi masking in 1st pass |
28 |
|
* 15.04.2002 updated cbr support |
29 |
* 07.04.2002 min keyframe interval checkbox |
* 07.04.2002 min keyframe interval checkbox |
30 |
* 2-pass max bitrate and overflow customization |
* 2-pass max bitrate and overflow customization |
31 |
* 04.04.2002 interlacing support |
* 04.04.2002 interlacing support |
71 |
|
|
72 |
REG_INT const reg_ints[] = { |
REG_INT const reg_ints[] = { |
73 |
{"mode", ®.mode, DLG_MODE_CBR}, |
{"mode", ®.mode, DLG_MODE_CBR}, |
|
{"bitrate", ®.bitrate, 900000}, |
|
74 |
{"quality", ®.quality, 85}, |
{"quality", ®.quality, 85}, |
75 |
{"quant", ®.quant, 5}, |
{"quant", ®.quant, 5}, |
76 |
{"rc_buffersize", ®.rc_buffersize, 16}, |
{"rc_bitrate", ®.rc_bitrate, 900000}, |
77 |
|
{"rc_reaction_delay_factor",®.rc_reaction_delay_factor, 16}, |
78 |
|
{"rc_averaging_period", ®.rc_averaging_period, 100}, |
79 |
|
{"rc_buffer", ®.rc_buffer, 100}, |
80 |
|
|
81 |
{"motion_search", ®.motion_search, 5}, |
{"motion_search", ®.motion_search, 5}, |
82 |
{"quant_type", ®.quant_type, 0}, |
{"quant_type", ®.quant_type, 0}, |
293 |
{ |
{ |
294 |
default : |
default : |
295 |
case DLG_MODE_CBR : |
case DLG_MODE_CBR : |
296 |
config->bitrate = config_get_int(hDlg, IDC_VALUE, config->bitrate) * CONFIG_KBPS; |
config->rc_bitrate = config_get_int(hDlg, IDC_VALUE, config->rc_bitrate) * CONFIG_KBPS; |
297 |
break; |
break; |
298 |
|
|
299 |
case DLG_MODE_VBR_QUAL : |
case DLG_MODE_VBR_QUAL : |
310 |
} |
} |
311 |
|
|
312 |
config->mode = SendDlgItemMessage(hDlg, IDC_MODE, CB_GETCURSEL, 0, 0); |
config->mode = SendDlgItemMessage(hDlg, IDC_MODE, CB_GETCURSEL, 0, 0); |
|
config->rc_buffersize = config_get_int(hDlg, IDC_CBRBUFFER, config->rc_buffersize); |
|
313 |
} |
} |
314 |
|
|
315 |
|
|
328 |
|
|
329 |
case DLG_MODE_CBR : |
case DLG_MODE_CBR : |
330 |
text = "Bitrate (Kbps):"; |
text = "Bitrate (Kbps):"; |
331 |
value = config->bitrate / CONFIG_KBPS; |
value = config->rc_bitrate / CONFIG_KBPS; |
332 |
break; |
break; |
333 |
|
|
334 |
case DLG_MODE_VBR_QUAL : |
case DLG_MODE_VBR_QUAL : |
352 |
|
|
353 |
EnableWindow(GetDlgItem(hDlg, IDC_VALUE_STATIC), enabled); |
EnableWindow(GetDlgItem(hDlg, IDC_VALUE_STATIC), enabled); |
354 |
EnableWindow(GetDlgItem(hDlg, IDC_VALUE), enabled); |
EnableWindow(GetDlgItem(hDlg, IDC_VALUE), enabled); |
|
EnableWindow(GetDlgItem(hDlg, IDC_CBRBUFFER_STATIC), (config->mode == DLG_MODE_CBR)); |
|
|
EnableWindow(GetDlgItem(hDlg, IDC_CBRBUFFER), (config->mode == DLG_MODE_CBR)); |
|
355 |
} |
} |
356 |
|
|
357 |
|
|
372 |
case DLG_MODE_CBR : |
case DLG_MODE_CBR : |
373 |
text = "Bitrate (Kbps):"; |
text = "Bitrate (Kbps):"; |
374 |
range = MAKELONG(0,10000); |
range = MAKELONG(0,10000); |
375 |
pos = config->bitrate / CONFIG_KBPS; |
pos = config->rc_bitrate / CONFIG_KBPS; |
376 |
break; |
break; |
377 |
|
|
378 |
case DLG_MODE_VBR_QUAL : |
case DLG_MODE_VBR_QUAL : |
459 |
void adv_mode(HWND hDlg, int mode) |
void adv_mode(HWND hDlg, int mode) |
460 |
{ |
{ |
461 |
// create arrays of controls to be disabled for each mode |
// create arrays of controls to be disabled for each mode |
462 |
const int cbr_disable[] = { |
const short twopass_disable[] = { |
463 |
IDC_KFBOOST, IDC_DISCARD1PASS, IDC_DUMMY2PASS, |
IDC_KFBOOST, IDC_DUMMY2PASS, IDC_USEALT, |
464 |
IDC_CURVECOMPH, IDC_CURVECOMPL, IDC_PAYBACK, IDC_PAYBACKBIAS, IDC_PAYBACKPROP, |
IDC_CURVECOMPH, IDC_CURVECOMPL, IDC_PAYBACK, IDC_PAYBACKBIAS, IDC_PAYBACKPROP, |
465 |
IDC_STATS1, IDC_STATS1_BROWSE, IDC_STATS2, IDC_STATS2_BROWSE, |
IDC_STATS2, IDC_STATS2_BROWSE, |
466 |
|
}; |
467 |
|
|
468 |
|
const short cbr_disable[] = { |
469 |
|
IDC_STATS1, IDC_STATS1_BROWSE, IDC_DISCARD1PASS, IDC_HINTEDME, |
470 |
IDC_CREDITS_START, IDC_CREDITS_END, IDC_CREDITS_START_BEGIN, IDC_CREDITS_START_END, |
IDC_CREDITS_START, IDC_CREDITS_END, IDC_CREDITS_START_BEGIN, IDC_CREDITS_START_END, |
471 |
IDC_CREDITS_END_BEGIN, IDC_CREDITS_END_END, IDC_CREDITS_RATE_RADIO, |
IDC_CREDITS_END_BEGIN, IDC_CREDITS_END_END, IDC_CREDITS_RATE_RADIO, |
472 |
IDC_CREDITS_QUANT_RADIO, IDC_CREDITS_QUANT_STATIC, IDC_CREDITS_SIZE_RADIO, |
IDC_CREDITS_QUANT_RADIO, IDC_CREDITS_QUANT_STATIC, IDC_CREDITS_SIZE_RADIO, |
474 |
IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE, |
IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE, |
475 |
}; |
}; |
476 |
|
|
477 |
const int qual_disable[] = { |
const short qual_disable[] = { |
478 |
IDC_KFBOOST, IDC_DISCARD1PASS, IDC_DUMMY2PASS, |
IDC_STATS1, IDC_STATS1_BROWSE, IDC_DISCARD1PASS, IDC_HINTEDME, |
479 |
IDC_CURVECOMPH, IDC_CURVECOMPL, IDC_PAYBACK, IDC_PAYBACKBIAS, IDC_PAYBACKPROP, |
IDC_CBR_REACTIONDELAY, IDC_CBR_AVERAGINGPERIOD, IDC_CBR_BUFFER, |
|
IDC_STATS1, IDC_STATS1_BROWSE, IDC_STATS2, IDC_STATS2_BROWSE, |
|
480 |
IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
481 |
}; |
}; |
482 |
|
|
483 |
const int quant_disable[] = { |
const short quant_disable[] = { |
484 |
|
IDC_STATS1, IDC_STATS1_BROWSE, IDC_DISCARD1PASS, IDC_HINTEDME, |
485 |
|
IDC_CBR_REACTIONDELAY, IDC_CBR_AVERAGINGPERIOD, IDC_CBR_BUFFER, |
486 |
IDC_MINIQUANT, IDC_MAXIQUANT, IDC_MINPQUANT, IDC_MAXPQUANT, |
IDC_MINIQUANT, IDC_MAXIQUANT, IDC_MINPQUANT, IDC_MAXPQUANT, |
|
IDC_KFBOOST, IDC_DISCARD1PASS, IDC_DUMMY2PASS, |
|
|
IDC_CURVECOMPH, IDC_CURVECOMPL, IDC_PAYBACK, IDC_PAYBACKBIAS, IDC_PAYBACKPROP, |
|
|
IDC_STATS1, IDC_STATS1_BROWSE, IDC_STATS2, IDC_STATS2_BROWSE, |
|
487 |
IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
488 |
}; |
}; |
489 |
|
|
490 |
const int twopass1_disable[] = { |
const short twopass1_disable[] = { |
491 |
IDC_LUMMASK, IDC_MINIQUANT, IDC_MAXIQUANT, IDC_MINPQUANT, IDC_MAXPQUANT, |
IDC_CBR_REACTIONDELAY, IDC_CBR_AVERAGINGPERIOD, IDC_CBR_BUFFER, |
492 |
IDC_KFBOOST, IDC_DUMMY2PASS, |
IDC_MINIQUANT, IDC_MAXIQUANT, IDC_MINPQUANT, IDC_MAXPQUANT, |
|
IDC_CURVECOMPH, IDC_CURVECOMPL, IDC_PAYBACK, IDC_PAYBACKBIAS, IDC_PAYBACKPROP, |
|
|
IDC_STATS2, IDC_STATS2_BROWSE, |
|
493 |
IDC_CREDITS_RATE_RADIO, IDC_CREDITS_RATE, IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, |
IDC_CREDITS_RATE_RADIO, IDC_CREDITS_RATE, IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, |
494 |
IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
495 |
}; |
}; |
496 |
|
|
497 |
const int twopass2_ext_disable[] = { |
const short twopass2_ext_disable[] = { |
498 |
|
IDC_CBR_REACTIONDELAY, IDC_CBR_AVERAGINGPERIOD, IDC_CBR_BUFFER, |
499 |
IDC_CREDITS_RATE_RADIO, IDC_CREDITS_QUANT_RADIO, IDC_CREDITS_QUANT_STATIC, |
IDC_CREDITS_RATE_RADIO, IDC_CREDITS_QUANT_RADIO, IDC_CREDITS_QUANT_STATIC, |
500 |
IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, IDC_CREDITS_RATE, |
IDC_CREDITS_SIZE_RADIO, IDC_CREDITS_END_STATIC, IDC_CREDITS_RATE, |
501 |
IDC_CREDITS_QUANTI, IDC_CREDITS_QUANTP, IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
IDC_CREDITS_QUANTI, IDC_CREDITS_QUANTP, IDC_CREDITS_START_SIZE, IDC_CREDITS_END_SIZE |
502 |
}; |
}; |
503 |
|
|
504 |
const int twopass2_int_disable[] = { |
const short twopass2_int_disable[] = { |
505 |
|
IDC_CBR_REACTIONDELAY, IDC_CBR_AVERAGINGPERIOD, IDC_CBR_BUFFER, |
506 |
IDC_STATS2, IDC_STATS2_BROWSE |
IDC_STATS2, IDC_STATS2_BROWSE |
507 |
}; |
}; |
508 |
|
|
509 |
// store pointers in order so we can lookup using config->mode |
// store pointers in order so we can lookup using config->mode |
510 |
const int* modes[] = { |
const short* modes[] = { |
511 |
cbr_disable, qual_disable, quant_disable, |
cbr_disable, qual_disable, quant_disable, |
512 |
twopass1_disable, twopass2_ext_disable, twopass2_int_disable |
twopass1_disable, twopass2_ext_disable, twopass2_int_disable |
513 |
}; |
}; |
514 |
|
|
515 |
// ditto modes[] |
// ditto modes[] |
516 |
const int lengths[] = { |
const int lengths[] = { |
517 |
sizeof(cbr_disable)/sizeof(int), sizeof(qual_disable)/sizeof(int), |
sizeof(cbr_disable)/sizeof(short), sizeof(qual_disable)/sizeof(short), |
518 |
sizeof(quant_disable)/sizeof(int), sizeof(twopass1_disable)/sizeof(int), |
sizeof(quant_disable)/sizeof(short), sizeof(twopass1_disable)/sizeof(short), |
519 |
sizeof(twopass2_ext_disable)/sizeof(int), sizeof(twopass2_int_disable)/sizeof(int) |
sizeof(twopass2_ext_disable)/sizeof(short), sizeof(twopass2_int_disable)/sizeof(short), 0 |
520 |
}; |
}; |
521 |
|
|
522 |
int i; |
int i; |
523 |
|
int hinted_me, use_alt, use_alt_auto, use_alt_auto_bonus; |
524 |
|
int credits_start, credits_end, credits_rate, credits_quant, credits_size; |
525 |
|
int cpu_force; |
526 |
|
|
527 |
// first perform checkbox-based enable/disable |
// first perform checkbox-based enable/disable |
528 |
CONTROLDLG(IDC_HINTFILE, ISDLGSET(IDC_HINTEDME)); |
hinted_me = ISDLGSET(IDC_HINTEDME); |
529 |
CONTROLDLG(IDC_HINT_BROWSE, ISDLGSET(IDC_HINTEDME)); |
CONTROLDLG(IDC_HINTFILE, hinted_me); |
530 |
|
CONTROLDLG(IDC_HINT_BROWSE, hinted_me); |
531 |
CONTROLDLG(IDC_USEAUTO, ISDLGSET(IDC_USEALT)); |
|
532 |
CONTROLDLG(IDC_AUTOSTR, ISDLGSET(IDC_USEALT) && ISDLGSET(IDC_USEAUTO)); |
use_alt = ISDLGSET(IDC_USEALT) && (mode == DLG_MODE_2PASS_2_EXT || mode == DLG_MODE_2PASS_2_INT); |
533 |
CONTROLDLG(IDC_USEAUTOBONUS, ISDLGSET(IDC_USEALT)); |
use_alt_auto = ISDLGSET(IDC_USEAUTO); |
534 |
CONTROLDLG(IDC_BONUSBIAS, (ISDLGSET(IDC_USEALT) && !(ISDLGSET(IDC_USEAUTOBONUS)))); |
use_alt_auto_bonus = ISDLGSET(IDC_USEAUTOBONUS); |
535 |
CONTROLDLG(IDC_CURVETYPE, ISDLGSET(IDC_USEALT)); |
CONTROLDLG(IDC_USEAUTO, use_alt); |
536 |
CONTROLDLG(IDC_ALTCURVEHIGH, ISDLGSET(IDC_USEALT)); |
CONTROLDLG(IDC_AUTOSTR, use_alt && use_alt_auto); |
537 |
CONTROLDLG(IDC_ALTCURVELOW, ISDLGSET(IDC_USEALT)); |
CONTROLDLG(IDC_USEAUTOBONUS, use_alt); |
538 |
CONTROLDLG(IDC_MINQUAL, ISDLGSET(IDC_USEALT) && !(ISDLGSET(IDC_USEAUTO))); |
CONTROLDLG(IDC_BONUSBIAS, use_alt && !use_alt_auto_bonus); |
539 |
|
CONTROLDLG(IDC_CURVETYPE, use_alt); |
540 |
CONTROLDLG(IDC_CREDITS_START_BEGIN, ISDLGSET(IDC_CREDITS_START)); |
CONTROLDLG(IDC_ALTCURVEHIGH, use_alt); |
541 |
CONTROLDLG(IDC_CREDITS_START_END, ISDLGSET(IDC_CREDITS_START)); |
CONTROLDLG(IDC_ALTCURVELOW, use_alt); |
542 |
|
CONTROLDLG(IDC_MINQUAL, use_alt && !use_alt_auto); |
543 |
CONTROLDLG(IDC_CREDITS_END_BEGIN, ISDLGSET(IDC_CREDITS_END)); |
|
544 |
CONTROLDLG(IDC_CREDITS_END_END, ISDLGSET(IDC_CREDITS_END)); |
credits_start = ISDLGSET(IDC_CREDITS_START); |
545 |
|
CONTROLDLG(IDC_CREDITS_START_BEGIN, credits_start); |
546 |
CONTROLDLG(IDC_CREDITS_RATE, ISDLGSET(IDC_CREDITS_RATE_RADIO)); |
CONTROLDLG(IDC_CREDITS_START_END, credits_start); |
547 |
CONTROLDLG(IDC_CREDITS_QUANTI, ISDLGSET(IDC_CREDITS_QUANT_RADIO)); |
|
548 |
CONTROLDLG(IDC_CREDITS_QUANTP, ISDLGSET(IDC_CREDITS_QUANT_RADIO)); |
credits_end = ISDLGSET(IDC_CREDITS_END); |
549 |
CONTROLDLG(IDC_CREDITS_START_SIZE, ISDLGSET(IDC_CREDITS_SIZE_RADIO)); |
CONTROLDLG(IDC_CREDITS_END_BEGIN, credits_end); |
550 |
CONTROLDLG(IDC_CREDITS_END_SIZE, ISDLGSET(IDC_CREDITS_SIZE_RADIO)); |
CONTROLDLG(IDC_CREDITS_END_END, credits_end); |
551 |
|
|
552 |
CONTROLDLG(IDC_CPU_MMX, ISDLGSET(IDC_CPU_FORCE)); |
credits_rate = ISDLGSET(IDC_CREDITS_RATE_RADIO); |
553 |
CONTROLDLG(IDC_CPU_MMXEXT, ISDLGSET(IDC_CPU_FORCE)); |
credits_quant = ISDLGSET(IDC_CREDITS_QUANT_RADIO); |
554 |
CONTROLDLG(IDC_CPU_SSE, ISDLGSET(IDC_CPU_FORCE)); |
credits_size = ISDLGSET(IDC_CREDITS_SIZE_RADIO); |
555 |
CONTROLDLG(IDC_CPU_SSE2, ISDLGSET(IDC_CPU_FORCE)); |
CONTROLDLG(IDC_CREDITS_RATE, credits_rate); |
556 |
CONTROLDLG(IDC_CPU_3DNOW, ISDLGSET(IDC_CPU_FORCE)); |
CONTROLDLG(IDC_CREDITS_QUANTI, credits_quant); |
557 |
CONTROLDLG(IDC_CPU_3DNOWEXT, ISDLGSET(IDC_CPU_FORCE)); |
CONTROLDLG(IDC_CREDITS_QUANTP, credits_quant); |
558 |
|
CONTROLDLG(IDC_CREDITS_START_SIZE, credits_size); |
559 |
|
CONTROLDLG(IDC_CREDITS_END_SIZE, credits_size); |
560 |
|
|
561 |
|
cpu_force = ISDLGSET(IDC_CPU_FORCE); |
562 |
|
CONTROLDLG(IDC_CPU_MMX, cpu_force); |
563 |
|
CONTROLDLG(IDC_CPU_MMXEXT, cpu_force); |
564 |
|
CONTROLDLG(IDC_CPU_SSE, cpu_force); |
565 |
|
CONTROLDLG(IDC_CPU_SSE2, cpu_force); |
566 |
|
CONTROLDLG(IDC_CPU_3DNOW, cpu_force); |
567 |
|
CONTROLDLG(IDC_CPU_3DNOWEXT, cpu_force); |
568 |
|
|
569 |
// now perform codec mode enable/disable |
// now perform codec mode enable/disable |
570 |
for (i=0 ; i<lengths[mode] ; ++i) |
for (i=0 ; i<lengths[mode] ; ++i) |
571 |
{ |
{ |
572 |
EnableWindow(GetDlgItem(hDlg, modes[mode][i]), FALSE); |
EnableWindow(GetDlgItem(hDlg, modes[mode][i]), FALSE); |
573 |
} |
} |
574 |
|
|
575 |
|
if (mode != DLG_MODE_2PASS_2_EXT && mode != DLG_MODE_2PASS_2_INT) |
576 |
|
{ |
577 |
|
for (i=0 ; i<sizeof(twopass_disable)/sizeof(short) ; ++i) |
578 |
|
{ |
579 |
|
EnableWindow(GetDlgItem(hDlg, twopass_disable[i]), FALSE); |
580 |
|
} |
581 |
|
} |
582 |
} |
} |
583 |
|
|
584 |
|
|
679 |
|
|
680 |
CheckRadioButton(hDlg, IDC_CPU_AUTO, IDC_CPU_FORCE, |
CheckRadioButton(hDlg, IDC_CPU_AUTO, IDC_CPU_FORCE, |
681 |
config->cpu & XVID_CPU_FORCE ? IDC_CPU_FORCE : IDC_CPU_AUTO ); |
config->cpu & XVID_CPU_FORCE ? IDC_CPU_FORCE : IDC_CPU_AUTO ); |
682 |
|
|
683 |
|
SetDlgItemInt(hDlg, IDC_CBR_REACTIONDELAY, config->rc_reaction_delay_factor, FALSE); |
684 |
|
SetDlgItemInt(hDlg, IDC_CBR_AVERAGINGPERIOD, config->rc_averaging_period, FALSE); |
685 |
|
SetDlgItemInt(hDlg, IDC_CBR_BUFFER, config->rc_buffer, FALSE); |
686 |
break; |
break; |
687 |
} |
} |
688 |
} |
} |
817 |
config->cpu |= ISDLGSET(IDC_CPU_3DNOW) ? XVID_CPU_3DNOW: 0; |
config->cpu |= ISDLGSET(IDC_CPU_3DNOW) ? XVID_CPU_3DNOW: 0; |
818 |
config->cpu |= ISDLGSET(IDC_CPU_3DNOWEXT) ? XVID_CPU_3DNOWEXT: 0; |
config->cpu |= ISDLGSET(IDC_CPU_3DNOWEXT) ? XVID_CPU_3DNOWEXT: 0; |
819 |
config->cpu |= ISDLGSET(IDC_CPU_FORCE) ? XVID_CPU_FORCE : 0; |
config->cpu |= ISDLGSET(IDC_CPU_FORCE) ? XVID_CPU_FORCE : 0; |
820 |
|
|
821 |
|
config->rc_reaction_delay_factor = config_get_int(hDlg, IDC_CBR_REACTIONDELAY, config->rc_reaction_delay_factor); |
822 |
|
config->rc_averaging_period = config_get_int(hDlg, IDC_CBR_AVERAGINGPERIOD, config->rc_averaging_period); |
823 |
|
config->rc_buffer = config_get_int(hDlg, IDC_CBR_BUFFER, config->rc_buffer); |
824 |
break; |
break; |
825 |
} |
} |
826 |
} |
} |
848 |
|
|
849 |
temp = config_get_int(hDlg, i + IDC_QINTRA00, config->qmatrix_intra[i]); |
temp = config_get_int(hDlg, i + IDC_QINTRA00, config->qmatrix_intra[i]); |
850 |
CONSTRAINVAL(temp, 1, 255); |
CONSTRAINVAL(temp, 1, 255); |
851 |
temp = config->qmatrix_intra[i]; |
config->qmatrix_intra[i] = temp; |
852 |
|
|
853 |
temp = config_get_int(hDlg, i + IDC_QINTER00, config->qmatrix_inter[i]); |
temp = config_get_int(hDlg, i + IDC_QINTER00, config->qmatrix_inter[i]); |
854 |
CONSTRAINVAL(temp, 1, 255); |
CONSTRAINVAL(temp, 1, 255); |
855 |
temp = config->qmatrix_inter[i]; |
config->qmatrix_inter[i] = temp; |
856 |
} |
} |
857 |
} |
} |
858 |
|
|
902 |
SendDlgItemMessage(hDlg, IDC_MODE, CB_ADDSTRING, 0, (LPARAM)"Null - test speed"); |
SendDlgItemMessage(hDlg, IDC_MODE, CB_ADDSTRING, 0, (LPARAM)"Null - test speed"); |
903 |
|
|
904 |
SendDlgItemMessage(hDlg, IDC_MODE, CB_SETCURSEL, config->mode, 0); |
SendDlgItemMessage(hDlg, IDC_MODE, CB_SETCURSEL, config->mode, 0); |
|
SetDlgItemInt(hDlg, IDC_CBRBUFFER, config->rc_buffersize, FALSE); |
|
905 |
|
|
906 |
InitCommonControls(); |
InitCommonControls(); |
907 |
|
|
952 |
config_reg_default(config); |
config_reg_default(config); |
953 |
|
|
954 |
SendDlgItemMessage(hDlg, IDC_MODE, CB_SETCURSEL, config->mode, 0); |
SendDlgItemMessage(hDlg, IDC_MODE, CB_SETCURSEL, config->mode, 0); |
|
SetDlgItemInt(hDlg, IDC_CBRBUFFER, config->rc_buffersize, FALSE); |
|
955 |
|
|
956 |
main_slider(hDlg, config); |
main_slider(hDlg, config); |
957 |
main_value(hDlg, config); |
main_value(hDlg, config); |